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SN74LV373APWRG4

SN74LV373APWRG4

SN74LV373APWRG4

815-SN74LV373APWRG4

Manufacturer:

Texas Instruments

Product Number:

815-SN74LV373APWRG4

Description:

SN74LV373APWRG4 Overview

Package 20-TSSOP (0.173, 4.40mm Width) includes it. This package has the format of Tape & Reel (TR). It uses Tri-State as the output. This electrical device h

Datasheet:

Description:

SN74LV373APWRG4 Overview

Package 20-TSSOP (0.173, 4.40mm Width) includes it. This package has the format of Tape & Reel (TR). It uses Tri-State as the output. This electrical device has a logic type of D-Type Transparent Latch. The way in which this electronic part is mounted is Surface Mount. The supply voltage of the device is 2V~5.5V. During operation, the temperature is set at -40°C~85°C. 74LV is the series number of this FPGA. With this electronic part, there are 8 bits. In this device, there are 20 terminations. The family it belongs to is 74LV373. A 2.5V voltage supply is required for operation. With 20 pins, it is equipped. It is part of the family of electronic devices called LV/LV-A/LVX/H. The pin configuration of the device is 20. Mounting this electronic component follows the Surface Mount method. This device has 2 ports that can be connected to it. This part is included in Bus Driver/Transceiver. 5.5V is the maximum supply voltage (Vsup). 3.3V power supplies are needed to operate it. Ensure that the supply voltage (Vsup) is greater than 2V. Input Lines consist of electronic circuits, and there are 8. As a result of its reliable performance, it is well suited for TR. The output current of 16mA makes it feature maximum design flexibility. As its maximal power current (ICC) reaches 0.02mA, it is able to operate.

SN74LV373APWRG4 Features

20-TSSOP (0.173, 4.40mm Width) package
74LV series
8 Bits
74LV373 family
20 pin count
20 pins
3.3V power supplies

SN74LV373APWRG4 Applications

There are a lot of Texas Instruments SN74LV373APWRG4 Latches applications.

Automotive Infotainment
Automotive Cluster
Multistage ripple counting
Motor Drives
Shift left with parallel loading
Counters
Parallel Output
Serial Output Data Queuing
Data acquisition
Registers

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